A CPU instruction set that is governed by the RISC V International organization, a nonprofit organization which also holds all the RISC V related trademarks.
It has nothing to do with open source really, it is a open standard that anyone can create compatible products for and those products can also be sold commercially.
Really the difference is that the organization verifying your that your CPU correctly follows the instruction set so you can sell it as such, has no profit motive, unlike ARM or Intel/AMD who either outright block any meaningful competition in the case of x86 or want a nice share of the money your gonna make in the case of ARM. Not to mention that ARM and Intel/AMD sell their own CPUs, so there is a big conflict of intressts going on.
No, open source means that its public HOW something is done, down to every single line of code (along a lot of other things when it comes to licensing, redistribution, … but thats not the main point)
With a open standard its public WHAT something is doing, but HOW its achieved can be public or not.
To give you a example, HTML is a open standard for displaying Webpages. Somewhere its defined that when a <button> element is found, the browser has to render a button which looks a certain way behaves a certain way when interacting with the mouse, keyboard, javascript, css … . This is WHAT your browser needs to do.
But HOW you do it is up to each browser. Do you use the CPU or GPU to render it? Do you first draw the border, then the text or the other way around? It doesn’t matter to the standard as long as the end result complies with the spec.
With open source browsers like chromium and firefox it is public HOW they are implementing this feature, down every line of code.
With a proprietary browser like Internet Explorer which follows (or rather followed) the same open standard nobody knows HOW they are implementing it. We only know that the end result is adhering to the HTML Standard.
The hardware equivalent it would be someone releasing the exact schematics of for example a RISC V CPU where somebody could see HOW they implement the specifications of the Architecture and where someone could without much hassle go to a Manufacturer and get the chip into production or make modifications.