Edit: I’m an idiot, T series is low power socketed, not mobile. 14900HX has a TDP of 55W but boosts short term to 157W, which is still pretty ridiculous
If you meant cell phones and tablets, that’s mostly due to the different architecture. RISC processors are super energy efficient, which also makes them much cooler to run.
x86-64 is a CISC architecture, which tends to be much more power hungry. There are only a couple of very low power Celeron CPUs that work under 10W of TDP, while that’s very common among phones’ CPUs.
In many cases it’s actually RISC under the hood and uses an interpreter to translate the CISC commands and run them in the most optimal manner on the silicon
ARM and RISC-V absolutely scale up to multi-hundred watt server CPUs quite easily. Just look at the Ampere systems you can rent from various VPSes for example
The big benefit that ARM and RISC-V have is they have no established backwards compatibility to keep carrying technical debt forwards. ARM versions their instruction sets and software has to be released for given versions of ARM cores, and RISC-V is simply too new to have any significant technical debt on the instruction set side.
Atom cores were notable for focusing the architecture on some instructions then other instructions would be a slog to execute, so they were really good at certain things and for desktop use (especially in the extremely budget machines they got shoved into) they were painful. Much like how eCores are now. They’re very carefully architected for power efficiency, and do their jobs extremely well, but an all eCore CPU is a slog for desktop use in many cases
It really isn’t. Modern mobile cpus barely sip power.
PL2 on a 14900T is 106W
Edit: I’m an idiot, T series is low power socketed, not mobile. 14900HX has a TDP of 55W but boosts short term to 157W, which is still pretty ridiculous
If you meant cell phones and tablets, that’s mostly due to the different architecture. RISC processors are super energy efficient, which also makes them much cooler to run.
x86-64 is a CISC architecture, which tends to be much more power hungry. There are only a couple of very low power Celeron CPUs that work under 10W of TDP, while that’s very common among phones’ CPUs.
In many cases it’s actually RISC under the hood and uses an interpreter to translate the CISC commands and run them in the most optimal manner on the silicon
ARM and RISC-V absolutely scale up to multi-hundred watt server CPUs quite easily. Just look at the Ampere systems you can rent from various VPSes for example
The big benefit that ARM and RISC-V have is they have no established backwards compatibility to keep carrying technical debt forwards. ARM versions their instruction sets and software has to be released for given versions of ARM cores, and RISC-V is simply too new to have any significant technical debt on the instruction set side.
Atom cores were notable for focusing the architecture on some instructions then other instructions would be a slog to execute, so they were really good at certain things and for desktop use (especially in the extremely budget machines they got shoved into) they were painful. Much like how eCores are now. They’re very carefully architected for power efficiency, and do their jobs extremely well, but an all eCore CPU is a slog for desktop use in many cases